This invention relates to semiconductor fabrication processing and more particularly to a method for fabricating oxygen diffusion barrier layers to enhance the electrical characteristics of a storage capacitor for a Dynamic Random Access Memory (DRAM).
The continuing trend of scaling down integrated circuits has forced the semiconductor industry to consider new techniques for fabricating precise components at sub-micron levels. With the industry moving towards processes for fabrication of smaller device geometries, isolation between devices becomes a very critical issue.
Fabrication processes for fabrication of DRAMs having smaller device geometries are of particular interest as each new generation of DRAMs push technology, including equipment limitations, to new areas of research. A major area of research has been in the development of the DRAM storage cell capacitor. Each DRAM generation requires a device that is more dense than the preceding generation and yet industry and competition demand that the physical size of the device remain comparable in size to the preceding generation. To accomplish this requirement, much of the DRAM research is focused on building a smaller storage capacitor and yet maintain adequate capacitance, as the storage capacitor requires a good portion of the DRAM dice.
One method of increasing capacitance without increasing the storage electrode size is by providing a storage cell dielectric that possesses high quality dielectric characteristics, such as a high dielectric constant, etc. The quality of a cell dielectric is also somewhat dependent on the type of material used to build the capacitor electrodes due mainly in part to the work function potential of the material. (The work function potential of a material is the potential of a barrier which must be overcome to remove an electron from the fermi-level to the vacuum level outside the material.) Electrodes made from titanium nitride (TiN) are desirable for use in DRAM capacitor due to the large barrier height (which will deter current conduction resulting from the work function potential of the TiN) that develops at the TiN/cell dielectric interface. This will potentially lead to leakage reduction in a dielectric dominated by electrode-limited conduction properties. The dielectric leakage current mechanism is dominated by the material properties of the capacitor electrodes rather than the dielectric itself, as the leakage current attributed to the characteristics of a dielectric is minimal when compared to the leakage current attributed to the material make-up of the capacitor electrodes themselves.
However, TiN electrodes are prone to an oxidation of the top 70 to 430 xc3x85 when exposed to an oxygen atmosphere at elevated temperatures. This oxidation of the TiN surface leads to poor nucleation of the cell dielectric which results in an increase in possible leakage current through the dielectric and a reduction in the reliability of the capacitor. This reduction in electrical quality has been shown to exist in both silicon nitride and tantalum oxide (Ta2O5) dielectrics deposited on TiN electrodes. For example, Si3N4 forms an excellent interface when it is deposited directly on bare silicon, but forms a poor interface when deposited on refractory metal nitrides, such as TiN, or on refractory metals themselves.
Typically, for a capacitor utilizing a Ta2O5 storage cell dielectric, the Ta2O5 is deposited on a lower capacitor electrode made up of a silicon nitride layer, formed by rapid thermal processing (RTP), which in turn is formed on top of polysilicon. This configuration creates a polysilicon/nitride/Ta2O5 interface. If the top capacitor electrode is TiN, a top Ta2O5/TiN interface is formed. This particular capacitor structure, consisting of a polysilicon/nitride/Ta2O5 interface, creates a lower barrier to leakage current then does the barrier created by the Ta2O5/TiN interface. Therefore the polysilicon/nitride/Ta2O5 interface allows a larger leakage current from the capacitor during a positive bias then does the Ta2O5/TiN interface. Due to this lower barrier height at the polysilicon/nitride/Ta2O5 interface the polysilicon/nitride/Ta2O5 interface now becomes the limiting factor in determining the performance of the capacitor.
Implementations of the present invention teach methods to efficiently use conductive materials, such as silicon, noble metals, refractory metals, refractory metal nitrides and in particular TiN, as the lower capacitor electrode and to avoid the above limitation (resulting from conventional processes). In the case of using TiN as the capacitor bottom electrode, conventional processes deposit a cell dielectric directly on the TiN electrode. However, these methods do not effectively limit the oxidation of the TiN prior to cell dielectric deposition. An embodiment of the present invention provides a reliable method to effectively use the conductive materials listed above as capacitor bottom electrode while providing a dielectric nucleation surface for a subsequent deposition of cell dielectric.
Exemplary implementations of the present invention disclose methods for chemically bonding a dielectric material to a conductive material in a semiconductor fabrication process. The process converts at least a portion of a conductive layer that has been formed directly on the conductive material to a dielectric compound, thereby forming a dielectric nucleation surface. After the nucleation surface is formed a dielectric film containing chemical elements that make the conductive layer is deposited directly on the dielectric nucleation surface. The converted portion of the conductive layer becomes a barrier layer to oxygen diffusion when the structure is subjected to a subsequent oxygen ambient. The process flirter provides suitable methods to fabricate capacitors that utilize conductive materials, such as, silicon, refractory metals, refractory metal nitrides, and noble metals, as the bottom electrode.